Acquiring data from sensors, transporting the data, and then archiving it for future reference has changed dramatically over the last few years. The traditional approach of collecting data from an analog-to-digital converter (ADC) with a small microprocessor to monitor the slow-changing levels of a signal is for the most part no longer adequate. Today's new advanced military systems now employ complex sensors capable of generating streams of data with rates of 100 megabytes and greater. To transfer this high-speed data from the sensor to a processor without losing signal characteristics, designers now must digitize the data at the sensor. To meet this requirement, designers needed a protocol that would transport the digital data with minimum processing or latency. This problem was pursued by several companies, including Curtiss- Wright, and the result was the ANSI/VITA 17.1-2003 Serial Front Panel Data Port standard (S-FPDP).
S-FPDP is designed to provide a highthroughput pathway between the sensor and processor with minimum latency or processor support. Although it is necessary to transfer the data quickly, it is also important that the data arrive with no undetected errors. Undetected errors can generate the false indication of a target, which can be just as problematic as missing the presence of an actual target. To support error detection, S-FPDP incorporates the same basic low-level structure used by the Fibre Channel standard, mainly the 8B/10B encoding and CRC.
Today's sensors do a substantial amount of data processing even before the data is sent to the digital signal processors (DSPs). While the intelligence located in the sensor is specialized to perform a variety of functions on the data, it is not intended to support a complex communications protocol. The SFPDP protocol was intentionally made simple to support this requirement. The sensor end of S-FPDP can be as simple as a 32-bit register and a clock signal. As data becomes available in the sensor, it is presented to the S-FPDP interface and the clock line is pulsed. Subsequent data is written in the same fashion and the interface combines the resulting data into a frame with the proper controls and CRC. To minimize the transfer latency, the data is serialized and transmitted as soon as it is received.
By using a low-level protocol, S-FPDP is capable of transferring data over a 2.5- gigabit channel at a rate of 247 megabytes per second. Typical protocol efficiencies over an S-FPDP connection are greater than 98% and latencies are normally less than 1 microsecond, excluding transmission time over the media.
Transmission of the data at these high rates is only one of the difficulties encountered in today's modern military systems. Another area of concern is the archival of the data for subsequent review and analysis, either at the same site or in another facility. Today's data acquisition applications, with multiple sensors generating data at rates exceeding 200 megabytes per second during missions lasting for hours, require a special class of archival system.
Current drive technologies have sustained throughputs between 50 and 100 MB/sec. A single recording drive media would be overwhelmed by a single stream of S-FPDP 247 megabytes per second data. To improve the drive throughput, multiple drives are typically combined in parallel fashion and the data is striped onto the drives. This approach enables the relatively slow drive media to keep up with the high data rates from the sensors.
Today's recording systems provide the capability to store multiple terabytes of data at rates of 200-plus megabytes per second per channel. They also provide several methods of retrieving the data in real time or for post-run analysis. Some of the retrieval methods available include physical drive removal, data dumping using multiple 4 GB/second Fibre Channel connections, and Gigabit Ethernet. The selection of the method is determined by the amount of data to be retrieved and the time available for the retrieval.
This work was done by Dr. Ralph Barrera of Curtiss-Wright Controls Embedded Computing. Contact Dr. Barrera at 937-252-5601 x1240, or visit here .