You can’t build a house without blueprints. So why do so many RF design flows try to build a board without a schematic? Most often, this crude process comes about due to lack of availability of RF design tools. But the wireless industry is the new cool kid on the block. As a result, electronic design automation (EDA) software vendors are scrambling to disencumber the rigid printed circuit board (PCB) world of tailored processes and streamlined user flows. RF engineers demand freedom from constraints, so EDA vendors are peeling back the layers of traditional PCB design and opening up some truly excellent solutions. But with these solutions, RF engineers are challenged to rethink their request for primitive simplicity and consider a higher-level process.
Traditional DXF-Driven RF Design Flow
To successfully examine the RF design challenge, it is important to first examine a traditional RF design flow. The term “traditional” is meant to convey that the flow is a common solution for many companies on the cutting edge that had no software tools available to help them. It is fair to say that many of these design flows were established many years ago, before software tools gained strength in the RF specialty.
This traditional RF design process is most easily identified in its use of DXF file transfer to bridge the RF and PCB design gap (see Figure 1). But there are very real problems with using primitive shapes in an advanced PCB design software package. Designers often have to “fake out” the software system by copying the primitive objects into component geometries, or by trying to manipulate the shapes as area fill objects.
In addition to these headaches, the primitive shapes can’t be modified very easily. Even if they are modified, Design Rule Checks (DRCs) can’t be fully exercised, introducing instability into the potential success of a design. In short, designers are left trying to use software methods that were never intended for RF design.
While many RF design companies have figured their way through these issues, there is one glaring problem with this design process: there is no schematic. This means that there is next to no control over the connectivity, and the presence of a schematic for the PCB portion of a mixed RF-digital-analog design becomes almost useless since synchronization of the schematic and layout can’t be accomplished without more dangerous workarounds. Some EDA vendors offer reverse engineering solutions to help these issues, but even then, the layout-driven design process can be messy and time-consuming. In the end, designs are difficult to reuse and only partially archived.
The positive response to all these negatives is that the EDA software systems are finally offering an unobstructed path for RF and mixed RF-digital-analog designs. The future of RF design will undoubtedly be reached using these new methods.
Integrated RF Design Flow
As RF designs gained a larger share of the electronics industry, RF engineers and EDA software vendors teamed up to work out exactly what the design process should be. EDA vendors have taken on more of a consulting role, where the needs of the RF community are heard and then steps are taken to try to ease their pain points in the design process. The results are not the same with every vendor, but most are gravitating toward a fully integrated solution with bidirectional data transfer between the RF simulation applications and the schematic and layout tools (see Figure 2).
While this new process is not as simple as the traditional DXF data transfer method, it offers many more advantages. The simulation-to-design cycle is now shortened into direct bidirectional data exchange with the schematic. This means that the RF circuit can be designed and simulated at any time during the PCB design and layout process, and changes are transferred much more quickly. In addition to shortening the design cycle, the schematic has finally entered the picture. Just as building a house requires blueprints, the RF and mixed-signal circuits are now complete “blueprints” that can be reused in new designs, used for future design revisions, and properly documented and archived.
But this is just the first positive step forward. With the intelligence of RF models and connectivity represented by the schematic, the same intelligent RF models can be placed into the layout. This is excellent for any RF design that utilizes parametric models, because changes are now much easier. The layout software system can provide the user with the model’s parameterized options for editing, and even help re-adjust surrounding microstrip or stripline elements to properly reflect shape changes. These changes can be back-annotated to the schematic and then sent back to the RF simulation tool for analysis to ensure that the circuit still performs properly.
As is often the case with improving existing processes, the benefits don’t stop. Now that intelligent circuits are placed into schematic and layout, they can be organized into blocks for use in other designs or for fast placement of arrays of repeated circuits that occur in layout. The blocks can be stored in a library and managed just like standard component geometries, so every designer can have instant access to the latest design revisions.
In conclusion, it is fair to say that the benefits gained by using an integrated, schematic-based system for RF design and layout far outweigh the arguments for sticking with the tried and true DXF file transfer methods. It is understandably difficult for design environments to embrace process changes such as what is proposed here, but the same effort and coordination that it takes to keep a design environment running could easily be channeled into embedding a new way of doing things. In an RF design environment that must stay on the cutting edge of technology, it should be clear that some consideration should be given to the processes that EDA software tools have defined and are now supporting in established RF design environments.
This article was written by Abby Monaco, Product & Marketing Manager for Intercept Technology, Atlanta, GA. For more information, Click Here