Prognostic health management (PHM) of electronic systems presents challenges that traditionally were not worth the cost of pursuit. Recent changes in weapons platform acquisition and support requirements have spurred renewed interest in electronics PHM, revealing accessible data sources and previously unexplored predictive techniques. This article discusses the development and validation of electronic prognostics for a radio frequency (RF) system. The solution has applicability to a broad class of mixed digital/analog circuitry, including radar and software-defined radio.

Figure 1. The setup for the accelerated failure test.

Many types of circuits compose avionics systems. One of the following categories can be used to classify each circuit topology:

  • High-frequency analog
  • Low-frequency analog
  • Low-impedance
  • High-impedance

Common failure mode mechanisms for analog circuits depend largely on the architecture and relative operating frequencies of the circuit. High-frequency analog circuits are categorized as operating above 1 GHz, while low-frequency analog circuits operate below 1 GHz. High-frequency analog circuits are sensitive to small changes in device parameters, resulting in non-destructive, or operational, failure modes. Unlike physical device failures, the cause of operational failures cannot be traced back to individual components. Low-frequency analog circuits are more likely to undergo physical device failure.

Avionics systems containing high-frequency analog circuits or RF circuits have high failure rates. Therefore, an avionics-related electronic system containing high-frequency RF components was considered to test this theory. The avionics system chosen was the Global Positioning System (GPS). The Garmin GPS 15L-W was selected for failure mode analysis and accelerated failure testing.

Failure Mode And System Analysis

A recent study of standalone GPS receivers that met Federal Aviation Administration (FAA) requirements found the probability of a receiver outage from a software-related problem is much greater than the occurrence of a total device failure. Failure mode analysis, starting at the device level, is essential to show that software failure modes manifest from small physical deviations in high-frequency analog circuits. In failure mode analysis, circuit models are developed to simulate a circuit’s performance when damage accumulates in discrete components.

Monte Carlo simulation utilizes these device-level circuit models to analyze the changes in performance characteristics of the high-frequency analog circuits. Then, a system-level fault-to-failure progression model is developed based on changes in circuit performance characteristics. The identified features from the system-level model describe the fault-to-failure transition.

The primary failure mode mechanisms in RF analog circuits occur within MOSFET devices. As MOSFETs begin to age, the dielectric material of the device begins to degrade. The silicon dioxide bonds that form the dielectric break as a result of interaction between highly charged electrons, known as hot carriers. In general, hot carriers are generated when the voltage between the gate and drain (Vgd) exceeds the voltage between the drain and source (Vds). Breakdown of the dielectric can lead to a failure mode known as Time Dependent Dielectric Breakdown (TDDB), which can gradually occur during normal operating conditions. Changes in a MOSFET’s C-V and I-V device characteristics occur prior to TDDB. Such deviations will alter the MOSFET’s device performance parameters, including gain, transconductance, series resistance, and threshold voltage.

Circuit Analysis

Many high-frequency analog circuits, such as RF mixers and RF low-noise amplifiers (LNA) are implemented using MOSFET devices. These circuits are sensitive to device variations at frequencies exceeding 1 GHz. Therefore, variation in any device, either active or passive, can cause the following circuit characteristics to change: Phase response, frequency response, linearity, gain, and impedance.

Figure 2. (a) Experimental GUI of healthy GPS receiver and; (b) experimental GUI of a degraded GPS receiver.

RF mixers are composed of transistors and traditional passive devices including inductors, capacitors, and resistors. A Monte Carlo worst-case analysis was performed on a RF mixer circuit. The TDDB damage accumulation model replaced the MOSFET devices in both circuits. The equivalent gate-to-source capacitance (Cgso) provided a damage accumulation parameter with a tolerance of 10%. The time domain phase of the RF mixer plots for ten different trials indicated an absolute maximum phase difference of 10%.

Analyzing a sophisticated electrical system using a schematic can be rather complex. Instead, a system diagram can be used to model system functionality by representing the functionality of the electrical system. A GPS receiver consists of three fundamental stages: Input stage, conversion stage, and processing stage.

The front end of the input stage consists of an antenna and a RF amplifier. The conversion stage demodulates the incoming RF signal for data recovery. It consists of the demodulator, phase-lock feedback mechanism, and data recovery/reconstruction. In a basic binary phase shift keying (BPSK) system, the output from the RF amplifier is downconverted to a lower frequency or an intermediate frequency (IF) and mixed with quadrature LO signals. The composite signal is then fed back to phaselock to the carrier. Low-pass filtering the outputs of one of the mixers recovers the data. The data can be digitally processed once it is recovered from the RF signal. The digital processing stage recovers navigation messages by continuously synchronizing each satellite’s gold code with the incoming data stream. The overall reliability of a GPS receiver depends on the tolerance of each subsystem. The two largest reliability concerns include the LNA and the RF mixers.

Failure mode, effects, and criticality analysis (FMECA) is a method of analysis used to understand the root cause of failures, along with their relative probability of occurrence, criticality, and their effects on a system. The FMECA used for the GPS receiver provided a complete description of the fault-to-failure progression.

Feature Extraction and Failure Testing

Direct measurements of diagnostic features are typically not feasible because they require advanced and usually impractical measuring techniques. However, system-level features can provide valuable and easily obtainable diagnostic and prognostic information. For example, in a GPS receiver, there are system-level features universal to all receivers. Most receivers report these features using the NMEA 0183 protocol. Therefore, data acquisition techniques only require a standard RS-232 connection.

GPS satellites can also be used as remote monitoring sensors to collect system performance data for different elevation and azimuth angles. The principle feature value of a particular satellite is dependent on the satellite’s elevation angle with respect to the receiver. The principle feature value can be plotted and normalized to generate a model with one degree of freedom. Additionally, the effects of low elevation noise, such as the multi-path effect, are minimal for elevation angles greater than 30°.

Accelerated failure testing validated the derived diagnostic feature set. Accelerated failure tests were conducted by placing a GPS receiver, or the Device Under Test (DUT), into an environmental chamber exposing the DUT to thermal cycling. During the test, the DUT received a constant reference signal from a GPS satellite simulator located approximately six feet away. A laptop monitored the features using a RS-232 connection. Thermal cycling halted every 100 cycles to record 24 hours of live constellation data. The cycle time between data collections lasted 40 minutes. Figure 1 shows the setup for the accelerated failure test.

Electronic PHM Development

Feature-based diagnostics and prognostics can be implemented for electronic systems by identifying key prognostic features that correlate with failure progression. Obtained features can be tracked and trended over the system’s life and compared with the model-based useful-life-remaining estimates to provide collaborative evidence of a degrading or failing condition. A feature-driven artificial intelligence-based approach can implement such a PHM system.

The theoretical concepts and experimental results discussed here combine to create a real-time PHM system for the GPS receiver. The system used data from the accelerated failure tests to display the progression of component degradation. Figure 2a shows the PHM results from a healthy GPS receiver and its associated health index. Figure 2b shows the PHM results from a degraded GPS receiver and its associated health index.

Utilizing sound engineering principles and building on diligent study of physical failure mechanisms, the developed electronic PHM technology leverages existing circuit operational data as a basis for prognostic feature extraction and provides a high-confidence component health index. This index reflects the component’s current operating condition and establishes the foundation for a prediction of remaining useful life.

This technique will extend to other RF electronic applications where digital data is readily available during the normal operation of the device. Software-defined radios and radar applications are two examples.

This article was written by Douglas W. Brown, Patrick W. Kalgren, Carl S. Byington, and Rolf F. Orsagh of Impact Technologies, LLC, Rochester, NY. For more information, Click Here