As a vertical market, “defense electronics” encompasses a huge range of systems, from portable communications to transportation, avionics, and shipborne radar. While the power architectures are as diverse as they could be, all have common operational demands — they must be robust (shock, vibration, temperature extremes), highly reliable, able to power up after periods of dormancy, and based on components with minimal obsolescence.
Low-inductance, low-ESR power filter capacitors can improve power distribution quality over a wide spectrum of signal types, from digital to RF power. These innovative input and output capacitors employ novel technology designed to positively impact power supply noise in battery, fuel cell, and avionic systems. In addition to capacitor solutions, there are other passive designs for circuit protection that are necessary to maintain signal integrity while containing ESD events and controlling EMI emission and susceptibility.
First, we will take a look at digital signal processing. Traditionally, avionic and satellite power applications are associated with the 28V bus, (or 14V for vehicular), which in turn are converted for low-voltage power distribution where required. It is this area that is seeing rapid growth due to the increase in digital content of both control systems and payload (including programmable arrays and analog digital (ADC or DAC) conversion for sensors). New designs continue to adopt ASICS with higher processing speeds, requiring Multilayer Ceramic Chip Capacitors (MLCC) used for decoupling to have lower parasitic elements, i.e. Low Equivalent Series Resistance (ESR) and Low Equivalent Series Inductance (ESL).
The closer to the core ASIC or programmable array, the more critical becomes the control of the ESL. As capacitors are two-terminal devices, the base ESL characteristic arises from the geometry of the part — the two terminals effectively define a current loop for the signal, and the larger the part, the larger the loop and hence the ESL. A basic way to counter this is to use a “reverse geometry” Low Inductance Chip Capacitor (LICC) that has the terminations on the sides, rather than the ends, of the parts. In a 2:1 aspect ratio part such as a 1206 size, using a reverse geometry version, 0612, will reduce inductance by a factor of 2 (typically from 1 nH to 500 pH) for the same capacitance/voltage design and the same amount of real estate.
Lower inductances still can be achieved by using smaller outline parts with smaller loops (0508 instead of 0805, 0306 instead of 0603, etc.), but this comes at the cost of decreasing capacitance value — and capacitance retention at the ASIC operating frequency is still a requirement. So, for faster speeds, new component designs are needed where the inductive component can be separated from the capacitive. There are three ways to do this — by inductance cancellation, by having very small signal loops, and by minimizing inductive coupling to the PCB ground plane.
A good example of inductance cancellation is the Inter-Digital Capacitor (IDC). This is a reverse geometry design, but instead of having solid terminations, the part is terminated along the side with stripes, or fingers, with each alternate pair of stripes being connected to alternating pairs of plates in the multilayer stack. This means that inductive cancellation can take place, and by having a ViaInPad (VIP) design, the loop to the ASIC I/O can be minimized. This type of design can result in <200 pH ESL for an 0612 4.7 μF/6v device.
In order to minimize current loop, a new series of Land Grid Array (LGA) components has been developed having extremely tightly controlled termination dimensions. Using a vertical internal electrode system means that the average current loop between ports is extremely small and has the added advantage of minimizing ground plane coupling. These parts can achieve <30 pH for a 0.1 μF/4v for a small 0306 4.7 μF/6v device.
For many avionics or government programs, reliability levels beyond commercial grade are required. While many of these technologies do not yet have MILspec equivalents, COTSplus versions that have voltage aging and conformance testing to MIL standards are available. Another requirement is that all component terminations must contain 3% Pb minimum. While the commercial versions of all of the above technologies are RoHS compliant (with 100% matte Sn termination), the COTSplus versions standardize on SnPb terminations.
As we come out from the core or ASIC, the DC output that holds up the system requires bulk capacitance with low ESR to minimize noise and ripple, with the ideal SMT passive technology for maximum volumetric efficiency being tantalum chip. Tantalum technology enables high CV (capacitance × voltage) to be achieved with high volumetric efficiency (e.g. CV ratings from 330 μ F/6v to 4.7 μ F/50v in a 77-mm3 package). Apart from filtering and decoupling applications, their high CV range also suits them to pulse applications.
The tantalum chips are characterized by a fully molded body with compliant (wraparound) termination, decoupling them mechanically from the PCB, so that they are ideally suited to withstand high shock and vibration over a wide range of substrate materials with differing coefficients of thermal expansion (CTE). To match their mechanical performance with electrical robustness for “mission-critical” applications, the ca pacitors require full lot assessment, which includes voltage conditioning (defined as Weibull reliability grading, which is also a requirement for DSCC 07016 ratings). As tantalum dielectric cannot be subjected to a high level of overvoltage to accelerate life conditions, the Wiebull system uses a combination of voltage and temperature acceleration factors while the lot is statistically monitored throughout the 42.5-hour minimum test. This grading allows parts to be released to failure rates below 0.1 to 0.001 %/1000 hours at 90% confidence limit.
Having optimized the characteristics for discrete capacitors, for medium-power applications it’s often necessary to use a bank of capacitors in parallel, or for higher voltage bus lines (e.g. 28v) in applications where the derating rules are conservative, a parallel/series configuration of capacitors to achieve the needed total application capacitance, ESR target, and required voltage derating.
A stacked tantalum module can be configured in standard two-, four-, or six-unit stacks with other custom configurations available. The advantage of using such stacks is that they can be assembled with parts having inset ESR limits and, by matching the ESR in a stack, ensure that current sharing is better equalized. From the design perspective, this advantage gives a large reduction in real estate with better system volumetric efficiency on the PCB.
For additional safety, there is a series that includes a Weibull-grade reliability capacitor matched to an internal fast-acting (thin film) fuse. This gives the best of both options — established reliability performance and failsafe operation, with the minimum of added ESR. It is designed as both a discrete capacitor and in module format (and all with standard dimensions). In the module version, each element is independently fused so in the event of one element failure, there is still redundancy in the system. For broadband filtering on power lines, MLCCs with resonances in the 1 MHz to 100 MHz range are often used in parallel with the tantalum chips.
While current capacitor technologies are able to maximize the performance of high-speed digital applications, the devices themselves are more at risk due to increased EMI and ESD susceptibility, so onboard circuit protection is an area of major focus.
While the newer generations of low-voltage/ high-speed ASICs are increasingly susceptible, they are also being used in more ESD/EMI hostile environments. From an ESD point of view, the increasing number of secure handheld communication devices, with multiple USB I/Os and increasing data stream sensitivity, will require protection against multiple ESD events throughout their operational lifetime. As EMI detection devices become more sensitive, they must also have emissions minimized for “stealth” operations. At the same time, they require protection from any local EMI generator they may encounter in the field.
For ESD protection, a multilayer varistor (MLV) has become the mainstay of the electronics industry, due to its small size, standard “chip” outline (0402–1210 size), and robust characteristics (-65 °C to +150 °C operation). The benefits of this technology are that, due to its unique material characteristics, it will clamp ESD spikes faster than a silicon Transient Voltage Suppressor (TVS) type as well as survive thousands of events with zero degradation. These events are based on 8 kV contact, or 14 kV air human body model discharges.
Because the parts are supplied in standard SMT chip format, it means that arrays can also be provided — typical solutions can have 2 to 4 channels in 0508 or 0612 size for protecting multiple data lines with a single placement. Another benefit of the construction is that capacitance can be controlled; in some applications, the capacitance can be maximized (10 pF–100 pF range) so the parts act as ESD protection with a small built-in EMI capacitor. In other applications (data port or antenna protection), capacitance can be minimized. Typically, with USB ports any antenna will benefit from low capacitance (3 pF–10pF range), but new applications for HDMI data protection require sub-pF capacitance — even lower than the typical parasitic capacitance of a silicon TVS device.
For EMI control, feed-thru capacitors maximize the intrinsic inductance from the geometry of the internal feed-thru channel and capacitor plates (standard class I or class II materials) to provide an LC filter with precise inductance value and essentially no insertion loss in the circuit. Again, these are readily available as feed-thru arrays to provide multi-line filtering. One application that benefits is filtering RGB signal lines for LCD screen or CCD camera applications (especially if connected with flex cables, which can have high EMI cross-sections).
Capacitors for Radar Applications
While the above has been aimed at the growing low-voltage sector for defense electronics, the same principals — low ESR, low ESL, and transient protection — also govern high-power applications.
Radar is one example of an application that requires pulse power — energy derived instantaneously to a system so that minimal voltage droop occurs due to the power demand.
For avionic applications operating from a 28V bus, high-voltage solutions are needed such as tantalum chip banks, Wet Tantalum, or stacked ceramic switch mode capacitors. When looking for the maximum capacitance/lowest ESR options for radar, the switch mode ceramic solution will have the lowest ESR, but also a lower capacitance value.
The wet tantalum solution will have high capacitance, but the ESR of these devices is characterized in ohms in the 10- kHz range. Tantalum chip has the optimum combination of capacitance and ESR in the milliohm range at 100 KHz, but operation on a 28V bus requires a 50V rated solution (or a new 63V rating) as a minimum, so a robust and reliable version is required.
At this scale, the EMI filtering needs to have high current handling capability, so discoidal capacitors assembled in hermetic feed-thru configurations are used. These are available in discrete bulkhead or bracket assemblies, or multi-channel arrays.
For these devices in avionics applications, transients remain an issue, but on a different scale. While digital circuits are concerned with ESD, avionic control applications have to factor in lightning strikes. For commercial aviation, the trend is to composite material airframes, each region having a different susceptibility to lightning. Switch mode ceramic capacitors can now be tested to D0-160 standards, depending on the strike level certification required by the customer application.
This article was written by Chris Reynolds, Application Manager, at AVX Corporation, Fountain Inn, SC. For more information, Click Here