As electronic components continue to move increasingly into surface- mount packages exclusively, prototype manufacturing firms are seeing a shift in the fabrication and assembly work needed to implement engineering prototypes. The shift is subtle but relentless; as new components come to market in SMT packages, QFPs, BGAs and the like, board design and assembly for prototypes must change to accommodate the surface mount components.

The increased use of SMT components is shifting the PCB prototyping process.

In some cases, a prototype design that might otherwise have used through-hole and DIP components now must make use of the SMT packages. And where that design might have once been assembled in-house from fabricated boards and standard parts kept in the design team’s parts locker, now it needs the precise assembly work of a pick-and-place machine. This shift forces prototypes into a different manufacturing channel.

Furthermore, the smaller and smaller dimensions associated with these surface- mount components and advanced packages put additional strain on the designers during the prototyping phase. Dimensions, spacing, and tolerances are much tighter.

“It wasn’t too terribly long ago that just about any design could still be built with all thru-hole parts,” states Duane Benson, Marketing Manager at Screaming Circuits, a leading quick-turn assembly corporation, “Once the big CPU chips stopped showing up in PGA (pin grid array), thru-hole PC motherboard possibilities went out. Then, when Bluetooth and Zigbee came around, most, if not all, of those chips came out in BGA, LGA, or QFN forms — no thru-hole at all. Now, it’s not too difficult to complete almost any design with all SMT parts.”

Engineers are shortening key phases of the PCB prototyping process by making use of multi-layer boards.

At Sunstone Circuits, we have been tracking the increased use of a prototyping technique that many companies, especially those using surface-mount components and advanced packages, have been using to tackle the increased complexity of SMT prototyping and the economic stresses of the current market. It’s an interesting development that also shows up in our conversations with printed circuit board engineers at trade shows, customer sites, or whenever we find ourselves discussing prototyping techniques with designers using a wide variety of PCB layout tools. It’s not that this technique is new, but the economic pivot point has clearly shifted, a product of technology, component packaging, and recession-style economics. Nevertheless, designers are increasingly using multi-layer board designs throughout the prototype phase to shorten the initial design times and save project dollars in the long run.

Here’s how this approach works for many engineers:

  1. Rather than struggle for a couple of weeks to squeeze their prototype design onto a two-layer board, designers are adding an internal layer or two to the prototype board. With these additional layers available for routing, engineers can expand the spacing between traces “just a little” and let the auto-router do the work. Where there might typically be a few days of effort to fit everything onto the two-layer proto board, now the effort is reduced to a few hours. This drastically shortens the layout time spent on the prototype and potentially shaves a spin off the overall prototyping process by allowing the designer larger tolerances away from the critical routing close in to the advanced packages.
  2. The designers then get the boards assembled and validate the prototype’s core functionality. While the purchase price for the prototype’s bare board will be a bit higher, the money saved in labor costs that results by taking a week or so off the prototype layout process is much greater than the incremental fab costs.
  3. These designers tend to enter the production optimization phase ahead of their schedule and under budget, leaving them valuable breathing room with which to optimize down to a production-ready two-layer board.

The benefits to the design team are as follows:

  • Shorter design time — reduced labor cost;
  • Better DFM tolerances — reduced risk of shorts or design mistakes;
  • Fewer prototype spins — saved budget dollars on boards and, more importantly, components and assembly labor.

Large printed circuit board design firms have been using this prototyping technique for a number of years. It works well for designs in which there isn’t a lot of high-speed design, and where strict compliance is not a requirement. Obviously not all designs fit into this sweet spot, but when they do, you can use the technique to your advantage.

So how does this all pencil out? Let’s look at an example using some hypothetical numbers. As always, the specifics of your project will be different than those used in this example. Work the numbers with your specific data to estimate the cost savings you’ll see in your environment. For the meantime, though, let’s assume the following:

  • One layout designer costs $100/day. Whether employee or contractor, this number is probably conservatively low, once you factor in the costs of health care and facilities costs.
  • The design in this example takes 10 days of schematic work.
  • The design in this example takes 12 work days to lay out as a two-layer, or four days to lay out as a multi-layer.
  • Two-layer printed circuit bare boards cost $450 to fabricate.
  • $1,500 in parts and assembly costs to populate your board.
  • A typical prototype process requires three spins

Let’s also assume that the multi-layer technique results in a $600 per order cost for PCB fabrication, reduces layout design time from 12 days to four, and saves the design team one spin overall.

The project cost numbers results in a multi-layer prototype that’s actually 61% of the cost of the two-layer approach, and requires 54% of the overall design cycle.

The overall effect to the design team is that the layout portion of the process takes much less time. The saved design team labor cost is the big savings here. The multi-layer board may cost a few extra dollars ($150) in this case, but the reduction in layout design time saves $800 per engineer in days saved alone, netting $650 per spin just in payroll. When we factor in the removal of one complete design spin (rework, revalidation, reorder, remanufacture, retest) the cost savings from the reduced spin just compounds on top of the per-spin savings.

In this example, the project cost numbers are shown in the accompanying table, resulting in a multi-layer prototype that’s actually 61% of the cost of the two-layer approach, and requires 54% of the overall design cycle.

For this technique to work well, there are a few prerequisites. If only some of these conditions apply, your payoff may not be as noticeable. If none apply, you’re probably not a good candidate for this approach.

  • Your board will fit within the restrictions of a two-layer format once optimized. The first step is to assure yourself that you will be able to get your circuit to fit on your target production format before you even begin.
  • Your company accounts for staff labor as a part of the project cost. If you are a hobbyist or an individual working on your own (no-cost) time, then this technique still works, but is of more limited value.
  • Your prototype board will be optimized before production. If your prototype is likely to be used unchanged for production, your product will carry an ongoing incremental cost increase as a result of the multi-layer board. If your plan all along is to optimize down to a two-layer configuration, then the 33 days you saved ought to give you plenty of time to get the optimization “just right.”

Given the economic environment we’ve all been working under in recent months, and the inexorable march toward smaller, faster, and cheaper, the trend is no longer just to be found in the features and dimensions of our product designs. It also can be found in the business practices of our design teams. By making full use of multi-layer, along with strategic use of assembly services, design teams can dramatically shorten key parts of the PCB prototyping design process, thereby validating their designs faster and easier. This can be done without a negative impact on the process of optimizing for production. In fact, the extra man-weeks saved in prototyping are likely to deliver the extra time designers wish they’d had to get their production designs beyond merely good, and into the realm of great.

This article was written by Nolan Johnson, CAD/EDA Manager, Sunstone Circuits (Mulino, OR). For more information, contact Mr. Johnson at This email address is being protected from spambots. You need JavaScript enabled to view it., or visit http://info.hotims.com/34459-402.


Embedded Technology Magazine

This article first appeared in the October, 2011 issue of Embedded Technology Magazine.

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