Development of robust semiconductor devices with high energy efficiency and reliability is a key objective towards 'Energy Conversion and Power Management ' for naval system applications. The goal of this research is to create the fundamental knowledge needed for the development of novel approaches to synthesize high-quality, thick SiC epitaxial layers (> 100μm) for reliable high voltage (≥10kV) / high power (>100 kW) electronics for navy ship applications.
This program focuses on (a) developing innovative solutions to the current main limitation in SiC homoepitaxy — reduction/ elimination of device-killing defects; (b) gaining understanding of the chemical vapor deposition processes in SiC epitaxy, specifically related to precursor gas decomposition dynamics and subsequent parasitic deposition of Si, C and SiC on the gas injector tube walls; and (c) achieving both high growth rate and high quality epitaxial films in a cost-effective manner.
This research investigated the epitaxial growth of thick films using halogenated precursors: chlorine-based dichlorosilane (DCS) and fluorine-based tetrafluorosilane (TFS). Growth using DCS is extensively studied, showing high growth rate (>25μm/h), excellent doping control (n+, n-, SI, p-), good epilayer morphology (RMS<2nm for 4° SiC) and low defect densities (BPD, IGSF densities 0≈5.6cm-2. Extensive study of dichlorosilane provides evidence that even chlorosilane gases are not the best solution to eliminate Si droplet formation and suppress parasitic deposition, which subsequently degrades crystal quality. The understanding gained from this research led to the first use of fluorinated silicon precursor with much stronger bonds to grow SiC epitaxy. Tetrafluorosilane (TFS, SiF4) has been utilized for the first time to completely eliminate Si droplet formation and suppress parasitic deposition by 80%. The ability of TFS to suppress particulates enables long duration, high quality thick epitaxy in the cleanest reactor environment. Epitaxial film growth rate, the influence of C/Si ratio of the precursor gases on doping concentration and crystal quality, growth process conditions, etc., have been investigated.
High quality, thick epitaxy (120 μm) was demonstrated on 8° substrate at a growth rate of 30μm/h using TFS. Excellent control of the uniformities of doping level and morphology makes TFS especially suitable for large wafer and multiwafer CVD growth to achieve SiC devices with excellent performance uniformity. In terms of epilayer quality including morphology, roughness, crystallinity, polytype inclusion, BPD density, etc., epigrowth using TFS is found to be superior to the growth using DCS or silane gases. Defect free epilayer growth (≈0 BPD density) was achieved by a two-step epilayer growth by growing a buffer layer epi-eutectic etch-regrowth process using DCS precursor. High quality on-axis epilayers were grown using TFS at low flow rates (5 sccm) with increased step flow growth at high C/Si ratio offering the potential for defect free epilayers, a significant breakthrough SiC technology.
Ni/4H-SiC Schottky diodes fabricated on DCS-grown and TFS-grown epilayers show similar barrier heights (>1.6eV) and ideality factors (<1.1). The tightest distribution of Schottky parameters is reported for Ni/SiC Schottky system fabricated on TFS-grown epilayer.
This work was done by Tangali S. Sudarshan of the University of South Carolina for the Office of Naval Research. NRL-0068
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Development of High Quality 4H-SiC Thick Epitaxy for Reliable High Power Electronics Using Halogenated Precursors
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