For orbiting satellites, design requirements are extensive as a result of the extreme environment in space, including wide-ranging and rapidly changing temperatures, satellite body charging effects and high-energy particle bombardment and radiation. These dynamics drive the need for high-reliability engineering concepts for all system components. In the case of microelectronics, this takes a unique form and drives innovation for techniques to overcome these damaging effects.
While the term radiation encompasses a wide range of phenomena, in the context of space effects and microelectronics the concept is typically organized around ionizing or high-energy cosmic rays. These degrading effects stem from various astronomical events including solar coronal ejections, particles trapped in the earth’s magnetic fields and galactic cosmic rays which are high-energy protons and heavy ions originating from outside our solar system.
In the case of electronic architectures, designing systems and components that survive and perform predictably in these conditions is a particularly challenging, yet critical endeavor as radiation effects can rapidly change transistor operating characteristics or even cause complete failure via Single Event Effects (SEEs) as shown in Figure 1, or over time due to the Total Ionizing Dose (TID).
Improving Microelectronics Reliability in Space
For some mission types, orbits can be selected which will minimize radiation exposure i.e. by avoiding placing a satellite in a known radiation belt (Figure 2). Even if that is possible, there is still a spectrum of effects that any satellite in a space environment will experience.
To combat these effects, system designers employ several techniques. First and foremost, shielding of electronics systems offers a brute force approach to minimize the interaction of high energy particles with transistor bodies by simply stopping or slowing them down at the shield.
While this is a simple approach, shielding is dead weight, and for space systems that require a rocket launch, consideration for size, weight and power (SWaP) means there are practical limitations to how robustly systems can be shielded. Additionally, shielding approaches can be effective for low energy protons and electrons but have lesser effectiveness for high energy radiation types common in space. Thus, for satellite systems (which are not repairable once deployed), maximum reliability is critical and it is necessary to employ all reasonable techniques to optimize mission lifetimes, including the use of high-reliability microelectronics.
Radiation Hardened Microelectronics by Design
Rad-hard by design leverages several concepts including component configuration, layout and redundancy solutions. Examples of this include adding more memory or logic cells than are needed for redundancy to improve probability of a longer time before failure, or to enable reconfiguration of circuit operation to circumvent cells which fail during the mission. This approach has been a proven technique for improving reliability in extreme environments but amounts to a clever response, mitigating the degrading effects rather than making chips less sensitive to them. Therefore, a more robust solution is realized by combining these hardening-by-design concepts with devices that are more immune to radiation effects: the rad-hard by process approach.
Radiation Hardened Microelectronics by Process
The rad-hard by process approach tackles the radiation head-on by making transistor bodies which are less sensitive to the degrading effects. All mainstream approaches for process hardening of silicon microelectronics leverage depleted silicon substrate starting materials referred to as Partially Depleted Silicon on Insulator (PDSOI) or Fully Depleted Silicon on Insulator (FDSOI), as illustrated in Figure 3. These materials are chosen for microelectronics fabrication because of their insulating effect on the transistor channel from the bulk substrate where charge is free to accumulate after a particle impact. In both cases, the thin transistor channel also serves to reduce the probability of an impact in the region, which would cause the most significant degradation to transistor function.
In the case of FDSOI, which is known to utilize channel cross sections even smaller than those in PDSOI (thinner), this effect further reduces high energy particle interactions in the channel region and isolates transistors from transient free charge produced by radiation in the bulk region, thus improving radiation performance. These substrates are also paired with transistor designs utilizing body ties; this serves to mitigate floating body potential effects that arise from radiation induced free charge that accumulates quickly in the transistor bodies due to SEEs and can lead to failure mechanisms (see Table 1). As a secondary benefit, microelectronics fabricated on SOI substrates are known for improving power consumption metrics as they enable better transistor pinch-off, which can dramatically reduce power consumption.
90 nm Strategic Rad-Hard by Process Solution
SkyWater Technology, a solely U.S.-based and U.S.-owned, DMEA-accredited Category 1A Trusted Foundry, is enhancing microelectronics capabilities for the Strategic Rad-Hard market supported by an investment of up to $170M by the US Department of Defense (DOD). Through this multiphase project, a 90 nm process hardening technique is being produced at SkyWater and will utilize approaches developed to achieve radiation immunity performance to match the Strategic Rad-Hard specification. While Strategic Rad-Hard ICs do exist, 150 nm process geometry is its most advanced form today in the market.
Advancing Strategic Rad-Hard technology to 90 nm process geometry will support increased density of circuits, which improves speed and performance for digital applications. Furthermore, this approach is extensible to FDSOI substrates, which will enable additional performance gains beyond those achieved just by advancing the transistor geometry.
In addition, the SkyWater initiative will bring to market this technology as a platform offering so-called Rad-SoCTM, which will provide an unprecedented spectrum of Strategic Rad-Hard solutions for system designers as shown in Figure 4. This flexible platform will be enabled by an ecosystem of partners and will improve access to proven IP, accelerate development cycles and ultimately streamline product development. Moreover, production of the specialized ICs in SkyWater’s commercially focused volume fab will be conducive to higher yield and production quality than is commonly observed in LRIP (low rate initial production) or development fabs where rad-hard chips are often produced.
Growing Demand for High Reliability Microelectronics
While this new foundry offering is an exciting development for defense applications, SkyWater’s predominantly commercial market focus will enable variations of the technology to be accessible to the medical and burgeoning commercial space industries. There is a quiet, but intense competition waging today among a number of titans to build global communication and Wi-Fi networks that heavily leverage satellite-based communication constellations to provide a continuous broadcast over the Earth’s surface (Figure 5). These networks require vast numbers of satellites to provide the continuous coverage necessary for high reliability consumer and industrial use. Though the low Earth orbits typically used for these commercial applications are less sensitive to degrading radiation effects, they may still benefit from the increased reliability the Rad-SoC platform will deliver.
This article was written by Ross Miller, Director of Marketing, SkyWater Technology (Bloomington, MN).For more information, visit here .