In the Heinrich Hertz satellite mission, which will be launched in 2020, the DLR Space Administration (German Aerospace Center) plans to develop and operate a German communications satellite. The chief objective of the mission is the scientific validation and testing of payload technologies in space.
The mission will test whether particular novel modulation techniques and waveforms lend themselves to onboard processing. Another objective is to test onboard switching techniques including IP over Satellite. Among other things, the satellite will carry a 30-GHz receiving antenna and a 20-GHz transmitting antenna for broadband communication with fixed terminals and even mobile devices. This necessitates the development and integration of technologies for use both onboard the satellite and on the ground.
The satellite will include the Fraunhofer On-Board Processor (FOBP) — a flexible, programmable communication payload for satellite-based digital signal processing applications — from Fraunhofer Institute for Integrated Circuits (Erlangen, Germany). To date, communication satellites operate almost exclusively with transparent transponders that receive the signals from the Earth station, amplify them, and transmit them back. The FOBP consists of radiation-hardened field programmable gate arrays (FPGAs) that make it possible to fully reconfigure the FOBP from the Earth station. That means the processor can be adapted to new communications standards and to changing environmental conditions at any time while in orbit.
High Flexibility for New Communications Standards
The reconfigurable OBP permits highly innovative approaches to satellite communications. One goal is to devise new communications protocols that allow direct transmission from satellite to receiver, eliminating the need for the signal to be processed at a ground station (single-hop connectivity).
The use of FPGAs means the processor's hardware architecture can be reconfigured, offering maximum flexibility for a range of applications. This provides a basis for the implementation of transmission techniques to be developed. The entire digital signal processing chain can be reconfigured by uploading configuration files. Thanks to a transponder bandwidth of up to 450 MHz, the FOBP is highly versatile and suited to new communications standards:
Hardware architecture based on two state-of-the-art FPGAS that can be reconfigured from the Earth station to guarantee maximum flexibility for a wide variety of applications.
Radiation-hard, high-speed ADCs and DACs that enable direct sampling of the L-band intermediate frequency.
Availability of higher bandwidth enables high data rates for broadband communication with stationary terminals and mobile devices.
In addition, the OBP enables user-to-satellite communication (return link). Research is being done into a variety of techniques for receiving, processing, and retransmitting signals using an OBP. Fast parallel signal processing onboard the satellite guarantees the optimum signal-to-noise ratio. It also enables error correction, which brings benefits in terms of transmission power and bit rate.
Onboard Processor for New Applications
The FOBP will be used on the geostationary satellite Heinrich Hertz, designed to operate for 15 years. The FOBP can be used for the following purposes:
Satellite communications with return link capability for nomadic and mobile users
Measurement of solar radiation and total ionizing dose (TID)
Dynamic adaptation of the FPGA firmware to the current solar radiation condition
Single-hop connectivity over IP (Internet protocol)
Flexible adaptation to existing systems due to its scalable bandwidth, which ranges from broadband to narrowband such as for sensor data (power meters)
Fraunhofer IIS is responsible for the following parts of the mission:
Development of new protocols, e. g. for direct satellite communication
Testing of new modulation and coding schemes
In-orbit verification of radiation sensors (together with Fraunhofer INT). absorbed radiation dose (UV EPROM), and solar particle events (SRAM, BRAM in FPGA)
Research into adaptive single event upset (SEU) mitigation methods for configuring the optimal redundancy in an FPGA
In-orbit verification of the HallinOne® technology for contactless measurement of the FPGA power consumption.