As wireless mobile devices grow in capability and complexity, the associated growth in power demand is driving new approaches to battery utilization and power efficiency. One of the single largest power consumers in a wireless handset is the RF Power Amplifier (PA) and as such, improved efficiency techniques like Envelope Tracking (ET) and Digital Pre-Distortion (DPD) are being increasingly utilized. The key implication for test engineers — whether in design, characterization, or manufacturing test — is that testing these devices with this additional capability can potentially drive up both test cost and overall test time. This article discusses various approaches to maximizing test equipment utilization and reducing test times for such component RF PAs and front-end modules.

The Problem

The demand for higher test speed spans from design validation to production test. As RF PAs support multiple modes, frequency ranges, and modulation formats, there is more to test during the validation phase. Thousands of tests are not uncommon. During RF PA production test, manufacturers have to deal with a number of critical issues; namely, speed, repeatability, cost, maintainability, and upgradability. Their biggest stress, however, comes from trying to balance speed and repeatability.

Typically, as test speed increases, repeatability decreases. Manufacturers must constantly struggle to balance these issues, while also keeping an eye on cost and maintainability. Addressing the speed challenge is further complicated by the fact that PAs are being manufactured in increasingly higher volumes to meet the demand for more and more wireless mobile devices, and have grown even more complex. Techniques like DPD and envelope tracking are often employed to help linearize the PA and increase its power efficiency, but these techniques only add to the testing that’s necessary during production, further slowing down the process. With PA manufacturers looking to reduce overall test times from 1.5 seconds to 500 ms or less, these slow-downs are simply no longer acceptable.

The Solution

Figure 1. System-level block diagram for a multi-DUT test. The RF PA power servo loop is a key requirement in PA testing and must be performed at each test condition.
The key to addressing the challenges now facing PA validation and manufacturing teams lies in finding a way to increase test speed while maintaining repeatability. Luckily, a number of test system techniques are now available to manufacturers for just such a task.

The first technique involves speeding up the PA power servo loop (Figure 1). A power servo loop is essentially a “test and adjust” process. The engineer sets the RF input power level to the Device-Under-Test (DUT), then checks the RF output of the DUT. If the RF output level is not within the required specification, the engineer changes the RF input level and checks again. This loop is continued until the correct output power level is achieved. Then, and only then, can the engineer start making measurements on the DUT. Getting this process done fast and allowing the engineer to quickly move on to making measurements is a key way to speed the overall RF PA test time.

Figure 2. Using the power servo loop approach in the PXI VSG, amplitude changes can be achieved in less than 200 μs.
Since power servos are a non-deterministic process, list mode cannot be used to determine the power level difference from step one to step two. Instead, it must be determined in real time. And, because PAs are typically not operated in the linear region of the amplifier, a 3-dB change in input power, for example, will not equate to a 3-dB change in output power. This is where baseband tuning methods like that available with a PXI vector signal generator (VSG) come in, offering a way to speed up the tuning process and, therefore, the test process itself.

The recommended PXI VSG approach for the power servo loop is to set the RF power level to the maximum level required from the source, then use the baseband power level to adjust the power level to the required input level. This is an iterative process that is performed until the output power reaches the required level for testing. The method is fast and accurate, enabling power servos to converge very quickly. In fact, with this baseband tuning technology, amplitude changes of up to 20 dB can be achieved in less than 200 μs (Figure 2). It can also be used for frequency offsets within the bandwidth of the generator, making it especially useful for measuring multiple channels within a band.

Fast Signal Processing

Once the power level is set correctly, the need for speed and accuracy switches to the analysis hardware. In this case, a PXIe Vector Signal Analyzer (VSA), which operates from 1 MHz to 6 GHz, or a PXIe performance VSA, which operates from 9 kHz to 27 GHz – both with up to 160MHz analysis bandwidth – offer the ideal solution. With outstanding linearity, repeatability, and absolute amplitude accuracy, power servos can converge faster, thereby reducing PA component test times. Moreover, the PXI VSA can be combined with the PXI VSG for a fast, compact PA test solution.

Figure 3. The fastest technique for performing input power servo and measuring ACPR is to use FFT acquisition for both servo and ACPR.
For power measurements, the PXI VSA features two data acquisition modes: power acquisition and FFT (Fast Fourier Transform). Power acquisition mode takes a time record of IQ data and returns a single integrated power number. The time required for this measurement is typically low – around 100 μs of overhead in addition to the acquisition time. In FFT mode, the data is run through a hardware FFT, and the result is a series of 64 to 512 spectrum bins. The time required to perform the FFT is roughly equivalent to the time it takes to perform a single power measurement. Using these two test modes, there are three basic methods for performing input power servo and measuring Adjacent Channel Power Ratio (ACPR). Test times will vary depending on which method is selected.

  1. Power Acquisition for Servo and ACPR. This method produces fast results by using the same power acquisition mode for both the servo and ACPR measurement. First, it’s used for the servo loop, which normally converges between 2 and 3 steps. Once it converges, the input power and gain are measured. Next, the ACPR is measured. This is performed 4 to 6 times to measure the 2 or 3 adjacent channels.
  2. Power Acquisition for Servo, FFT for ACPR. With this approach, the servo loop uses the power acquisition mode as above, but the FFT mode is used for power measurements. The engineer simply makes one FFT measurement instead of 4 to 6, and from that, calculates the power for all adjacent channels. The method enables faster measurements by simply reducing the number of measurements needed to obtain the ACPR data.
  3. FFT Acquisition for Servo and ACPR. With this approach, the FFT acquisition mode is used for both the servo and ACPR and because of this, when it comes to making power measurements, no further measurement for ACPR is required. With no ACPR measurement necessary, this approach is by far the fastest of the three options (Figure 3).

Optimizing Repeatability and Test Time

Figure 4. Using an external trigger with a short waveform is the ideal way to optimize repeatability and test time.
When it comes to optimizing repeatability and test time when making power measurements, there are a number of techniques available. One technique involves using an immediate trigger to start the measurement. This technique enables fast measurements because the engineer can measure at any time in the waveform, and does not have to wait for an external trigger; however, the measurement itself is often poor due to the significant variability throughout the waveform. Variations in power level add to the measurement uncertainty in power and ACPR measurements. Repeatability can be improved by increasing the measurement duration, but this increases the test time.

Another option is to use an external trigger to start the measurement. In this case, repeatability improves because the engineer is always measuring at the same time within the waveform, and there is no variation in modulation signal during the measurement. Unfortunately, repeatability comes at the expense of measurement time. Only one point in the waveform can be measured at any given time, and the delay to wait for an external trigger is, on average, half the total time of the waveform. Since the engineer isn’t actually making measurements during most of the waveform, this is wasted time.

Figure 5. When optimizing a short waveform length, getting too aggressive can actually increase the test time if the waveform is made too short, as shown on the left. Instead, the waveform should be set to just longer than the whole measurement cycle time, which includes the measurement time and processing time, as shown on the right.
An alternate approach involves shortening up the waveform by cutting it to just longer than the measurement acquisition time, and always measuring at the same point within the waveform. The test engineer measures at one point in the waveform, and the delay to wait for an external trigger is half the total time of the waveform, but since there is a much shorter waveform, the wait time is significantly reduced. The result is improved repeatability and significantly faster measurement time (Figure 4). When using this method, it’s important to not get too aggressive with reducing the length of the waveform, otherwise the next trigger might be missed and the test time would increase. Ideally, to optimize waveform length, the waveform should be set to just longer than the entire cycle time, including the measurement time and processing time (Figure 5). With the PXI VSA and VSG, roughly 500 to 600 μs is needed in addition to the acquisition time to achieve the optimum test time.

While this method works well for constant signals like WCDMA and LTE-FDD, it does not work for bursted waveforms (e.g., GSM and LTE-TDD). For these measurements, the engineer must maintain the duty cycle. Measurement time is improved by adjusting the burst length to be slightly longer than the acquisition time. The off time is then used for calculations and the PXI VSG setting.

Implications of Emerging Technologies

Figure 6. Shown here is a PA production test solution configuration with support for ET. This system is useful for testing PAs with ET and for dynamic EVM, commonly used for Wireless LANs to conserve power by turning the device off between packets.
Emerging technologies such as ET and DPD are commonly used to improve PA performance; however, their inclusion further burdens the manufacturer with additional testing. ET is a technique employed to improve the power efficiency of the amplifier by allowing the amplifier’s drain bias to track the magnitude of the input signal envelope. With this technique, a small reduction in gain enables the amplifier to be more linear, to reach higher peak powers, and to operate with greater efficiency. DPD is a technique often employed to correct for the PA’s nonlinearities caused by operating the PA in its region of high Power-Added Efficiency (PAE). With this technique, gain expansion is achieved, resulting in higher performing power amplifiers. Any new tests required as a result of ET or DPD will run counter to engineers’ need to reduce test time.

A typical characterization and test solution for testing PAs with ET and DPD is shown in Figure 6. The solution includes waveform generation software and PA test software for ET and DPD. It also includes hardware required for RF signal generation, envelope waveform generation, DUT, power, and RFFE control.


Reducing validation or manufacturing test time while maintaining repeatability, especially in the face of emerging technologies like ET and DPD, is absolutely essential to PA manufacturers. Fortunately, this can be accomplished through a combination of real-time signal processing, innovative baseband tuning technology, FFT acquisitions for power servo and ACPR measurements, and use of shorter waveforms with an external trigger.

This article was written by Jan R. Whitacre, Mainstream Wireless Technology Lead, Global Programs Marketing, for Keysight Technologies, Santa Rosa, CA. For more information, Click Here .