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Pyramid Micro-Electrofluidic-Spray Propulsion Thruster with Integrated Attitude and Thrust Vector Control

NASA’s Jet Propulsion Laboratory, Pasadena, California A micro-electrofluidic-spray propulsion (MEP) system was built on a micro scale, in which arrays of hundreds of nano-thrusters are etched on silicon wafers like ICs, only a centimeter on a side. Many dozens of these thruster chips can be arrayed to form a macro-thruster of finite and significant thrust. Approximately 300 centimeter-square, 100-micro-Newton micro-thrusters are arrayed in a square pyramidal structure. The pyramid is of shallow obliquity, with no more than 20° offset from the spacecraft face. This small angular offset is sufficient to provide thrust vector control (TVC) for the thruster.

Posted in: Briefs

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Mechanically Induced Nucleation Improves Crystalline Quality During Melt Growth of Semiconductors

Significantly lower supercooling results in the ideal growth condition of single crystal nucleation. Marshall Space Flight Center, Alabama For certain semiconductors with important applications, the existing bulk crystal growth technique from the melt usually results in poor-quality multi-crystalline ingots that cause the typically low yield of the commercial growth process. The low-quality, multi-grained crystal growth is mainly caused by the large supercool of the melt, which prohibits the ideal growth condition that a small, single-crystal nucleus forms at the very tip and grows into a large single crystal. For instance, semi-insulating cadmium zinc telluride (CdZnTe) crystal is a highly promising material for room-temperature x-ray and gamma ray detectors. However, the major hurdle in using the CdZnTe crystals is its cost. The ability to pack many data acquisition channels (hundreds) with the stopping power for high-energy radiation requires large single crystals of CdZnTe.

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A Resistive, High-Voltage, Differential Input Interface in a 3.3-V BiCMOS 0.5-μm Process for Extreme Environments

NASA’s Jet Propulsion Laboratory, Pasadena, California Wide-temperature and extreme-environment electronics are crucial to future missions. These missions will not have the weight and power budget for heavy harnesses and large, inefficient warm boxes. In addition, extreme-environment electronics, by their inherent nature, allow operation next to sensors in the ambient environment, reducing noise and improving precision over the warm-box-based systems employed today.

Posted in: Briefs, TSP, Power Management, Sensors

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Radiation Hard By Design (RHBD) Electronics

Under certain conditions, a false signal will be absorbed and a correct signal will be generated. Goddard Space Flight Center, Greenbelt, Maryland Current RHBD electronics are limited to speeds that approximate 250 MHz, regardless of the electronic process. The fact that determines the final speed is based on the nature of the current SEU (single-event upsets) radiation-tolerant latches, and the data flow between the latches through combinational logic.

Posted in: Briefs, TSP

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Detecting Loss of Configuration Access of Reprogrammable FPGA Without External Circuitry

This innovation makes use of the clearing of distributed memory that results from configuration refreshes. Langley Research Center, Hampton, Virginia The configuration of the reprogrammable field-programmable gate array (FPGA) currently on the market is very susceptible to single event upset when it operates in radiation environments. The current state-of-the-art approach is to refresh the configuration while the FPGA is operating. When using this approach, it is essential to detect the loss of configuration access while the FPGA is operating in a radiation environment, allowing the system to initiate a configuration access recovery.

Posted in: Briefs, TSP

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Micro-Coil Spring Interconnection for Ceramic Grid Array Packaged Integrated Circuits

This interconnection method extends the useful life of ceramic area array integrated circuits. Marshall Space Flight Center, Alabama This method of interconnecting ceramic integrated circuits to organic printed circuit boards (PCBs) is designed to substantially increase the life of the interconnections. This is accomplished by providing a means of compensating for the shear stresses produced by thermal excursions as a result of the large mismatch of coefficients of thermal expansion between the integrated circuit and the printed circuit board.

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Method for Formal Verification of Polymorphic Heterogeneous Multicore Processors

John H. Glenn Research Center, Cleveland, Ohio Amethod was developed to model polymorphic heterogeneous multicore processors at a high level of abstraction, and formally verify them. The Bahurupi polymorphic heterogeneous multi-core architecture allows the combination of multiple simple processor cores — which can be superscalar — in order to form a coalition that behaves like a wider superscalar processor. This is done at runtime under software directives, allowing the architecture to adapt to the needs of executed applications with high instruction level parallelism. Such coalitions of cores were found to have comparable or better performance than that of a wide superscalar processor with issue width equal to the sum of the issue widths of the simple cores in the coalition, while avoiding the complexity, reliability issues, and high power consumption of wide superscalar cores. All of these are highly desirable advantages of future microprocessors that will be optimized for aerospace applications.

Posted in: Briefs, TSP

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